OAI/Combinatorics/VariableWL/CellularCircuit.lean
32 declarations, 0 contain sorry, 0 declared as axioms
- def
OAI.VariableWL.Circuit.decodeGatesline 12 - theorem
OAI.VariableWL.Circuit.decodeGates_nonemptyline 17 - theorem
OAI.VariableWL.Circuit.output_decodeline 24 - theorem
OAI.VariableWL.Circuit.input_decodeline 30 - def
OAI.VariableWL.Circuit.encodeGatesline 39 - theorem
OAI.VariableWL.Circuit.encodeGates_nonemptyline 45 - theorem
OAI.VariableWL.Circuit.output_encodeline 52 - theorem
OAI.VariableWL.Circuit.input_encodeline 59 - theorem
OAI.VariableWL.Circuit.const_imageline 69 - def
OAI.VariableWL.Circuit.Description.decodeWitnessline 78 - def
OAI.VariableWL.Circuit.Description.encodedValuesline 125 - theorem
OAI.VariableWL.Circuit.Description.encodedValues_nonemptyline 131 - def
OAI.VariableWL.Circuit.Description.encodeWitnessline 141 - theorem
OAI.VariableWL.Circuit.Description.consistency_iffline 177 - abbrev
OAI.VariableWL.Circuit.Cellular.Tripleline 188 - abbrev
OAI.VariableWL.Circuit.Cellular.Scalarline 189 - abbrev
OAI.VariableWL.Circuit.Cellular.Andline 190 - abbrev
OAI.VariableWL.Circuit.Cellular.Edgeline 191 - structure
OAI.VariableWL.Circuit.Cellular.Dataline 194 - def
OAI.VariableWL.Circuit.Cellular.Data.stateline 204 - def
OAI.VariableWL.Circuit.Cellular.Data.sourceline 208 - def
OAI.VariableWL.Circuit.Cellular.Data.destinationline 213 - abbrev
OAI.VariableWL.Circuit.Cellular.Data.systemline 220 - def
OAI.VariableWL.Circuit.Cellular.Data.gateMeaningline 240 - def
OAI.VariableWL.Circuit.Cellular.Data.portMeaningline 248 - theorem
OAI.VariableWL.Circuit.Cellular.Data.meaningful_edgeline 255 - theorem
OAI.VariableWL.Circuit.Cellular.Data.true_meaningline 267 - theorem
OAI.VariableWL.Circuit.Cellular.Data.state_trueline 290 - theorem
OAI.VariableWL.Circuit.Cellular.Data.scalar_true_iffline 317 - def
OAI.VariableWL.Circuit.Cellular.Data.rankline 323 - theorem
OAI.VariableWL.Circuit.Cellular.Data.rank_increasesline 328 - theorem
OAI.VariableWL.Circuit.Cellular.Data.true_test_iffline 334