OAI/Combinatorics/EditApproximation/Refinement/PhysicalRequestBits.lean

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2 declarations, 0 contain sorry, 0 declared as axioms

The cache key width is linear in the input height, once the actual pass and copy bounds are substituted. The numerical capacity is only a bound: no array of that capacity is allocated.

  1. theorem OAI.EditApproximation.computed_entryCapacity_bound line 12
  2. theorem OAI.EditApproximation.computed_request_bits_le line 40